prepare 32bit support with name and class inheritance modifications

src/backends/icicle-emulator/icicle-bridge/src/icicle.rs

@@ -204,7 +204,7 @@ impl ExecutionHooks {
 pub struct IcicleEmulator {
     executing_thread: std::thread::ThreadId,
     vm: icicle_vm::Vm,
-    reg: registers::X64RegisterNodes,
+    reg: registers::X86RegisterNodes,
     syscall_hooks: HookContainer<dyn Fn()>,
     interrupt_hooks: HookContainer<dyn Fn(i32)>,
     violation_hooks: HookContainer<dyn Fn(u64, u8, bool) -> bool>,
@@ -275,7 +275,7 @@ impl IcicleEmulator {
         Self {
             stop: stop_value,
             executing_thread: std::thread::current().id(),
-            reg: registers::X64RegisterNodes::new(&virtual_machine.cpu.arch),
+            reg: registers::X86RegisterNodes::new(&virtual_machine.cpu.arch),
             vm: virtual_machine,
             syscall_hooks: HookContainer::new(),
             interrupt_hooks: HookContainer::new(),
@@ -555,7 +555,7 @@ impl IcicleEmulator {
         };
     }
 
-    fn read_generic_register(&mut self, reg: registers::X64Register, buffer: &mut [u8]) -> usize {
+    fn read_generic_register(&mut self, reg: registers::X86Register, buffer: &mut [u8]) -> usize {
         let reg_node = self.reg.get_node(reg);
 
         let res = self.vm.cpu.read_dynamic(pcode::Value::Var(reg_node));
@@ -580,11 +580,11 @@ impl IcicleEmulator {
         return limit;
     }
 
-    pub fn read_register(&mut self, reg: registers::X64Register, data: &mut [u8]) -> usize {
+    pub fn read_register(&mut self, reg: registers::X86Register, data: &mut [u8]) -> usize {
         match reg {
-            registers::X64Register::Rflags => self.read_flags::<u64>(data),
-            registers::X64Register::Eflags => self.read_flags::<u32>(data),
-            registers::X64Register::Flags => self.read_flags::<u16>(data),
+            registers::X86Register::Rflags => self.read_flags::<u64>(data),
+            registers::X86Register::Eflags => self.read_flags::<u32>(data),
+            registers::X86Register::Flags => self.read_flags::<u16>(data),
             _ => self.read_generic_register(reg, data),
         }
     }
@@ -606,16 +606,16 @@ impl IcicleEmulator {
         return limit;
     }
 
-    pub fn write_register(&mut self, reg: registers::X64Register, data: &[u8]) -> usize {
+    pub fn write_register(&mut self, reg: registers::X86Register, data: &[u8]) -> usize {
         match reg {
-            registers::X64Register::Rflags => self.write_flags::<u64>(data),
-            registers::X64Register::Eflags => self.write_flags::<u32>(data),
-            registers::X64Register::Flags => self.write_flags::<u16>(data),
+            registers::X86Register::Rflags => self.write_flags::<u64>(data),
+            registers::X86Register::Eflags => self.write_flags::<u32>(data),
+            registers::X86Register::Flags => self.write_flags::<u16>(data),
             _ => self.write_generic_register(reg, data),
         }
     }
 
-    fn write_generic_register(&mut self, reg: registers::X64Register, data: &[u8]) -> usize {
+    fn write_generic_register(&mut self, reg: registers::X86Register, data: &[u8]) -> usize {
         let reg_node = self.reg.get_node(reg);
 
         let mut buffer = [0u8; 32];

src/backends/icicle-emulator/icicle-bridge/src/lib.rs

@@ -2,7 +2,7 @@ mod icicle;
 mod registers;
 
 use icicle::IcicleEmulator;
-use registers::X64Register;
+use registers::X86Register;
 use std::os::raw::c_void;
 
 fn to_cbool(value: bool) -> i32 {
@@ -252,7 +252,7 @@ pub fn icicle_remove_hook(ptr: *mut c_void, id: u32) {
 #[unsafe(no_mangle)]
 pub fn icicle_read_register(
     ptr: *mut c_void,
-    reg: X64Register,
+    reg: X86Register,
     data: *mut c_void,
     size: usize,
 ) -> usize {
@@ -274,7 +274,7 @@ pub fn icicle_read_register(
 #[unsafe(no_mangle)]
 pub fn icicle_write_register(
     ptr: *mut c_void,
-    reg: X64Register,
+    reg: X86Register,
     data: *const c_void,
     size: usize,
 ) -> usize {

src/backends/icicle-emulator/icicle-bridge/src/registers.rs

@@ -1,6 +1,6 @@
 #[repr(i32)]
 #[derive(PartialEq)]
-pub enum X64Register {
+pub enum X86Register {
     Invalid = 0,
     Ah,
     Al,
@@ -244,7 +244,7 @@ pub enum X64Register {
 }
 
 #[derive(Clone)]
-pub(crate) struct X64RegisterNodes {
+pub(crate) struct X86RegisterNodes {
     rax: pcode::VarNode,
     rbx: pcode::VarNode,
     rcx: pcode::VarNode,
@@ -474,7 +474,7 @@ pub(crate) struct X64RegisterNodes {
     flags: Vec<pcode::VarNode>,
 }
 
-impl X64RegisterNodes {
+impl X86RegisterNodes {
     pub fn new(arch: &icicle_cpu::Arch) -> Self {
         let r = |name: &str| arch.sleigh.get_reg(name).unwrap().var;
         let nodes = [
@@ -731,234 +731,234 @@ impl X64RegisterNodes {
         }
     }
 
-    pub fn get_node(&self, reg: X64Register) -> pcode::VarNode {
+    pub fn get_node(&self, reg: X86Register) -> pcode::VarNode {
         match reg {
-            X64Register::Rax => self.rax,
-            X64Register::Rbx => self.rbx,
-            X64Register::Rcx => self.rcx,
-            X64Register::Rdx => self.rdx,
-            X64Register::Rsi => self.rsi,
-            X64Register::Rdi => self.rdi,
-            X64Register::Rbp => self.rbp,
-            X64Register::Rsp => self.rsp,
-            X64Register::R8 => self.r8,
-            X64Register::R9 => self.r9,
-            X64Register::R10 => self.r10,
-            X64Register::R11 => self.r11,
-            X64Register::R12 => self.r12,
-            X64Register::R13 => self.r13,
-            X64Register::R14 => self.r14,
-            X64Register::R15 => self.r15,
-            X64Register::Rip => self.rip,
-            X64Register::Cs => self.cs,
-            X64Register::Ds => self.ds,
-            X64Register::Es => self.es,
-            X64Register::Fs => self.fs,
-            X64Register::Gs => self.gs,
-            X64Register::Ss => self.ss,
-            X64Register::Ah => self.ah,
-            X64Register::Al => self.al,
-            X64Register::Ax => self.ax,
-            X64Register::Bh => self.bh,
-            X64Register::Bl => self.bl,
-            X64Register::Bpl => self.bpl,
-            X64Register::Ch => self.ch,
-            X64Register::Cl => self.cl,
-            X64Register::Cx => self.cx,
-            X64Register::Dh => self.dh,
-            X64Register::Dil => self.dil,
-            X64Register::Dl => self.dl,
-            X64Register::Dx => self.dx,
-            X64Register::Eax => self.eax,
-            X64Register::Ebp => self.ebp,
-            X64Register::Ebx => self.ebx,
-            X64Register::Ecx => self.ecx,
-            X64Register::Edi => self.edi,
-            X64Register::Edx => self.edx,
-            X64Register::Esi => self.esi,
-            X64Register::Esp => self.esp,
-            X64Register::Fpsw => self.fpsw,
-            X64Register::Gdtr => self.gdtr,
-            X64Register::Idtr => self.idtr,
-            X64Register::Ldtr => self.ldtr,
-            X64Register::Tr => self.tr,
-            X64Register::Cr0 => self.cr0,
-            X64Register::Cr1 => self.cr1,
-            X64Register::Cr2 => self.cr2,
-            X64Register::Cr3 => self.cr3,
-            X64Register::Cr4 => self.cr4,
-            X64Register::Cr8 => self.cr8,
-            X64Register::Dr0 => self.dr0,
-            X64Register::Dr1 => self.dr1,
-            X64Register::Dr2 => self.dr2,
-            X64Register::Dr3 => self.dr3,
-            X64Register::Dr4 => self.dr4,
-            X64Register::Dr5 => self.dr5,
-            X64Register::Dr6 => self.dr6,
-            X64Register::Dr7 => self.dr7,
-            X64Register::Fp0 => self.fp0,
-            X64Register::Fp1 => self.fp1,
-            X64Register::Fp2 => self.fp2,
-            X64Register::Fp3 => self.fp3,
-            X64Register::Fp4 => self.fp4,
-            X64Register::Fp5 => self.fp5,
-            X64Register::Fp6 => self.fp6,
-            X64Register::Fp7 => self.fp7,
-            /*X64Register::K0 => self.k0,
-            X64Register::K1 => self.k1,
-            X64Register::K2 => self.k2,
-            X64Register::K3 => self.k3,
-            X64Register::K4 => self.k4,
-            X64Register::K5 => self.k5,
-            X64Register::K6 => self.k6,
-            X64Register::K7 => self.k7,*/
-            X64Register::Mm0 => self.mm0,
-            X64Register::Mm1 => self.mm1,
-            X64Register::Mm2 => self.mm2,
-            X64Register::Mm3 => self.mm3,
-            X64Register::Mm4 => self.mm4,
-            X64Register::Mm5 => self.mm5,
-            X64Register::Mm6 => self.mm6,
-            X64Register::Mm7 => self.mm7,
-            X64Register::St0 => self.st0,
-            X64Register::St1 => self.st1,
-            X64Register::St2 => self.st2,
-            X64Register::St3 => self.st3,
-            X64Register::St4 => self.st4,
-            X64Register::St5 => self.st5,
-            X64Register::St6 => self.st6,
-            X64Register::St7 => self.st7,
-            X64Register::Xmm0 => self.xmm0,
-            X64Register::Xmm1 => self.xmm1,
-            X64Register::Xmm2 => self.xmm2,
-            X64Register::Xmm3 => self.xmm3,
-            X64Register::Xmm4 => self.xmm4,
-            X64Register::Xmm5 => self.xmm5,
-            X64Register::Xmm6 => self.xmm6,
-            X64Register::Xmm7 => self.xmm7,
-            X64Register::Xmm8 => self.xmm8,
-            X64Register::Xmm9 => self.xmm9,
-            X64Register::Xmm10 => self.xmm10,
-            X64Register::Xmm11 => self.xmm11,
-            X64Register::Xmm12 => self.xmm12,
-            X64Register::Xmm13 => self.xmm13,
-            X64Register::Xmm14 => self.xmm14,
-            X64Register::Xmm15 => self.xmm15,
-            /*X64Register::Xmm16 => self.xmm16,
-            X64Register::Xmm17 => self.xmm17,
-            X64Register::Xmm18 => self.xmm18,
-            X64Register::Xmm19 => self.xmm19,
-            X64Register::Xmm20 => self.xmm20,
-            X64Register::Xmm21 => self.xmm21,
-            X64Register::Xmm22 => self.xmm22,
-            X64Register::Xmm23 => self.xmm23,
-            X64Register::Xmm24 => self.xmm24,
-            X64Register::Xmm25 => self.xmm25,
-            X64Register::Xmm26 => self.xmm26,
-            X64Register::Xmm27 => self.xmm27,
-            X64Register::Xmm28 => self.xmm28,
-            X64Register::Xmm29 => self.xmm29,
-            X64Register::Xmm30 => self.xmm30,
-            X64Register::Xmm31 => self.xmm31,*/
-            X64Register::Ymm0 => self.ymm0,
-            X64Register::Ymm1 => self.ymm1,
-            X64Register::Ymm2 => self.ymm2,
-            X64Register::Ymm3 => self.ymm3,
-            X64Register::Ymm4 => self.ymm4,
-            X64Register::Ymm5 => self.ymm5,
-            X64Register::Ymm6 => self.ymm6,
-            X64Register::Ymm7 => self.ymm7,
-            X64Register::Ymm8 => self.ymm8,
-            X64Register::Ymm9 => self.ymm9,
-            X64Register::Ymm10 => self.ymm10,
-            X64Register::Ymm11 => self.ymm11,
-            X64Register::Ymm12 => self.ymm12,
-            X64Register::Ymm13 => self.ymm13,
-            X64Register::Ymm14 => self.ymm14,
-            X64Register::Ymm15 => self.ymm15,
-            /*X64Register::Ymm16 => self.ymm16,
-            X64Register::Ymm17 => self.ymm17,
-            X64Register::Ymm18 => self.ymm18,
-            X64Register::Ymm19 => self.ymm19,
-            X64Register::Ymm20 => self.ymm20,
-            X64Register::Ymm21 => self.ymm21,
-            X64Register::Ymm22 => self.ymm22,
-            X64Register::Ymm23 => self.ymm23,
-            X64Register::Ymm24 => self.ymm24,
-            X64Register::Ymm25 => self.ymm25,
-            X64Register::Ymm26 => self.ymm26,
-            X64Register::Ymm27 => self.ymm27,
-            X64Register::Ymm28 => self.ymm28,
-            X64Register::Ymm29 => self.ymm29,
-            X64Register::Ymm30 => self.ymm30,
-            X64Register::Ymm31 => self.ymm31,*/
-            /*X64Register::Zmm0 => self.zmm0,
-            X64Register::Zmm1 => self.zmm1,
-            X64Register::Zmm2 => self.zmm2,
-            X64Register::Zmm3 => self.zmm3,
-            X64Register::Zmm4 => self.zmm4,
-            X64Register::Zmm5 => self.zmm5,
-            X64Register::Zmm6 => self.zmm6,
-            X64Register::Zmm7 => self.zmm7,
-            X64Register::Zmm8 => self.zmm8,
-            X64Register::Zmm9 => self.zmm9,
-            X64Register::Zmm10 => self.zmm10,
-            X64Register::Zmm11 => self.zmm11,
-            X64Register::Zmm12 => self.zmm12,
-            X64Register::Zmm13 => self.zmm13,
-            X64Register::Zmm14 => self.zmm14,
-            X64Register::Zmm15 => self.zmm15,
-            X64Register::Zmm16 => self.zmm16,
-            X64Register::Zmm17 => self.zmm17,
-            X64Register::Zmm18 => self.zmm18,
-            X64Register::Zmm19 => self.zmm19,
-            X64Register::Zmm20 => self.zmm20,
-            X64Register::Zmm21 => self.zmm21,
-            X64Register::Zmm22 => self.zmm22,
-            X64Register::Zmm23 => self.zmm23,
-            X64Register::Zmm24 => self.zmm24,
-            X64Register::Zmm25 => self.zmm25,
-            X64Register::Zmm26 => self.zmm26,
-            X64Register::Zmm27 => self.zmm27,
-            X64Register::Zmm28 => self.zmm28,
-            X64Register::Zmm29 => self.zmm29,
-            X64Register::Zmm30 => self.zmm30,
-            X64Register::Zmm31 => self.zmm31,*/
-            X64Register::R8b => self.r8b,
-            X64Register::R9b => self.r9b,
-            X64Register::R10b => self.r10b,
-            X64Register::R11b => self.r11b,
-            X64Register::R12b => self.r12b,
-            X64Register::R13b => self.r13b,
-            X64Register::R14b => self.r14b,
-            X64Register::R15b => self.r15b,
-            X64Register::R8d => self.r8d,
-            X64Register::R9d => self.r9d,
-            X64Register::R10d => self.r10d,
-            X64Register::R11d => self.r11d,
-            X64Register::R12d => self.r12d,
-            X64Register::R13d => self.r13d,
-            X64Register::R14d => self.r14d,
-            X64Register::R15d => self.r15d,
-            X64Register::R8w => self.r8w,
-            X64Register::R9w => self.r9w,
-            X64Register::R10w => self.r10w,
-            X64Register::R11w => self.r11w,
-            X64Register::R12w => self.r12w,
-            X64Register::R13w => self.r13w,
-            X64Register::R14w => self.r14w,
-            X64Register::R15w => self.r15w,
-            X64Register::Fpcw => self.fpcw,
-            X64Register::Fptag => self.fptag,
-            //X64Register::Msr => self.msr,
-            X64Register::Mxcsr => self.mxcsr,
-            X64Register::FsBase => self.fs_base,
-            X64Register::GsBase => self.gs_base,
-            X64Register::Fip => self.fip,
-            X64Register::Fcs => self.fcs,
-            X64Register::Fdp => self.fdp,
-            X64Register::Fds => self.fds,
-            X64Register::Fop => self.fop,
+            X86Register::Rax => self.rax,
+            X86Register::Rbx => self.rbx,
+            X86Register::Rcx => self.rcx,
+            X86Register::Rdx => self.rdx,
+            X86Register::Rsi => self.rsi,
+            X86Register::Rdi => self.rdi,
+            X86Register::Rbp => self.rbp,
+            X86Register::Rsp => self.rsp,
+            X86Register::R8 => self.r8,
+            X86Register::R9 => self.r9,
+            X86Register::R10 => self.r10,
+            X86Register::R11 => self.r11,
+            X86Register::R12 => self.r12,
+            X86Register::R13 => self.r13,
+            X86Register::R14 => self.r14,
+            X86Register::R15 => self.r15,
+            X86Register::Rip => self.rip,
+            X86Register::Cs => self.cs,
+            X86Register::Ds => self.ds,
+            X86Register::Es => self.es,
+            X86Register::Fs => self.fs,
+            X86Register::Gs => self.gs,
+            X86Register::Ss => self.ss,
+            X86Register::Ah => self.ah,
+            X86Register::Al => self.al,
+            X86Register::Ax => self.ax,
+            X86Register::Bh => self.bh,
+            X86Register::Bl => self.bl,
+            X86Register::Bpl => self.bpl,
+            X86Register::Ch => self.ch,
+            X86Register::Cl => self.cl,
+            X86Register::Cx => self.cx,
+            X86Register::Dh => self.dh,
+            X86Register::Dil => self.dil,
+            X86Register::Dl => self.dl,
+            X86Register::Dx => self.dx,
+            X86Register::Eax => self.eax,
+            X86Register::Ebp => self.ebp,
+            X86Register::Ebx => self.ebx,
+            X86Register::Ecx => self.ecx,
+            X86Register::Edi => self.edi,
+            X86Register::Edx => self.edx,
+            X86Register::Esi => self.esi,
+            X86Register::Esp => self.esp,
+            X86Register::Fpsw => self.fpsw,
+            X86Register::Gdtr => self.gdtr,
+            X86Register::Idtr => self.idtr,
+            X86Register::Ldtr => self.ldtr,
+            X86Register::Tr => self.tr,
+            X86Register::Cr0 => self.cr0,
+            X86Register::Cr1 => self.cr1,
+            X86Register::Cr2 => self.cr2,
+            X86Register::Cr3 => self.cr3,
+            X86Register::Cr4 => self.cr4,
+            X86Register::Cr8 => self.cr8,
+            X86Register::Dr0 => self.dr0,
+            X86Register::Dr1 => self.dr1,
+            X86Register::Dr2 => self.dr2,
+            X86Register::Dr3 => self.dr3,
+            X86Register::Dr4 => self.dr4,
+            X86Register::Dr5 => self.dr5,
+            X86Register::Dr6 => self.dr6,
+            X86Register::Dr7 => self.dr7,
+            X86Register::Fp0 => self.fp0,
+            X86Register::Fp1 => self.fp1,
+            X86Register::Fp2 => self.fp2,
+            X86Register::Fp3 => self.fp3,
+            X86Register::Fp4 => self.fp4,
+            X86Register::Fp5 => self.fp5,
+            X86Register::Fp6 => self.fp6,
+            X86Register::Fp7 => self.fp7,
+            /*X86Register::K0 => self.k0,
+            X86Register::K1 => self.k1,
+            X86Register::K2 => self.k2,
+            X86Register::K3 => self.k3,
+            X86Register::K4 => self.k4,
+            X86Register::K5 => self.k5,
+            X86Register::K6 => self.k6,
+            X86Register::K7 => self.k7,*/
+            X86Register::Mm0 => self.mm0,
+            X86Register::Mm1 => self.mm1,
+            X86Register::Mm2 => self.mm2,
+            X86Register::Mm3 => self.mm3,
+            X86Register::Mm4 => self.mm4,
+            X86Register::Mm5 => self.mm5,
+            X86Register::Mm6 => self.mm6,
+            X86Register::Mm7 => self.mm7,
+            X86Register::St0 => self.st0,
+            X86Register::St1 => self.st1,
+            X86Register::St2 => self.st2,
+            X86Register::St3 => self.st3,
+            X86Register::St4 => self.st4,
+            X86Register::St5 => self.st5,
+            X86Register::St6 => self.st6,
+            X86Register::St7 => self.st7,
+            X86Register::Xmm0 => self.xmm0,
+            X86Register::Xmm1 => self.xmm1,
+            X86Register::Xmm2 => self.xmm2,
+            X86Register::Xmm3 => self.xmm3,
+            X86Register::Xmm4 => self.xmm4,
+            X86Register::Xmm5 => self.xmm5,
+            X86Register::Xmm6 => self.xmm6,
+            X86Register::Xmm7 => self.xmm7,
+            X86Register::Xmm8 => self.xmm8,
+            X86Register::Xmm9 => self.xmm9,
+            X86Register::Xmm10 => self.xmm10,
+            X86Register::Xmm11 => self.xmm11,
+            X86Register::Xmm12 => self.xmm12,
+            X86Register::Xmm13 => self.xmm13,
+            X86Register::Xmm14 => self.xmm14,
+            X86Register::Xmm15 => self.xmm15,
+            /*X86Register::Xmm16 => self.xmm16,
+            X86Register::Xmm17 => self.xmm17,
+            X86Register::Xmm18 => self.xmm18,
+            X86Register::Xmm19 => self.xmm19,
+            X86Register::Xmm20 => self.xmm20,
+            X86Register::Xmm21 => self.xmm21,
+            X86Register::Xmm22 => self.xmm22,
+            X86Register::Xmm23 => self.xmm23,
+            X86Register::Xmm24 => self.xmm24,
+            X86Register::Xmm25 => self.xmm25,
+            X86Register::Xmm26 => self.xmm26,
+            X86Register::Xmm27 => self.xmm27,
+            X86Register::Xmm28 => self.xmm28,
+            X86Register::Xmm29 => self.xmm29,
+            X86Register::Xmm30 => self.xmm30,
+            X86Register::Xmm31 => self.xmm31,*/
+            X86Register::Ymm0 => self.ymm0,
+            X86Register::Ymm1 => self.ymm1,
+            X86Register::Ymm2 => self.ymm2,
+            X86Register::Ymm3 => self.ymm3,
+            X86Register::Ymm4 => self.ymm4,
+            X86Register::Ymm5 => self.ymm5,
+            X86Register::Ymm6 => self.ymm6,
+            X86Register::Ymm7 => self.ymm7,
+            X86Register::Ymm8 => self.ymm8,
+            X86Register::Ymm9 => self.ymm9,
+            X86Register::Ymm10 => self.ymm10,
+            X86Register::Ymm11 => self.ymm11,
+            X86Register::Ymm12 => self.ymm12,
+            X86Register::Ymm13 => self.ymm13,
+            X86Register::Ymm14 => self.ymm14,
+            X86Register::Ymm15 => self.ymm15,
+            /*X86Register::Ymm16 => self.ymm16,
+            X86Register::Ymm17 => self.ymm17,
+            X86Register::Ymm18 => self.ymm18,
+            X86Register::Ymm19 => self.ymm19,
+            X86Register::Ymm20 => self.ymm20,
+            X86Register::Ymm21 => self.ymm21,
+            X86Register::Ymm22 => self.ymm22,
+            X86Register::Ymm23 => self.ymm23,
+            X86Register::Ymm24 => self.ymm24,
+            X86Register::Ymm25 => self.ymm25,
+            X86Register::Ymm26 => self.ymm26,
+            X86Register::Ymm27 => self.ymm27,
+            X86Register::Ymm28 => self.ymm28,
+            X86Register::Ymm29 => self.ymm29,
+            X86Register::Ymm30 => self.ymm30,
+            X86Register::Ymm31 => self.ymm31,*/
+            /*X86Register::Zmm0 => self.zmm0,
+            X86Register::Zmm1 => self.zmm1,
+            X86Register::Zmm2 => self.zmm2,
+            X86Register::Zmm3 => self.zmm3,
+            X86Register::Zmm4 => self.zmm4,
+            X86Register::Zmm5 => self.zmm5,
+            X86Register::Zmm6 => self.zmm6,
+            X86Register::Zmm7 => self.zmm7,
+            X86Register::Zmm8 => self.zmm8,
+            X86Register::Zmm9 => self.zmm9,
+            X86Register::Zmm10 => self.zmm10,
+            X86Register::Zmm11 => self.zmm11,
+            X86Register::Zmm12 => self.zmm12,
+            X86Register::Zmm13 => self.zmm13,
+            X86Register::Zmm14 => self.zmm14,
+            X86Register::Zmm15 => self.zmm15,
+            X86Register::Zmm16 => self.zmm16,
+            X86Register::Zmm17 => self.zmm17,
+            X86Register::Zmm18 => self.zmm18,
+            X86Register::Zmm19 => self.zmm19,
+            X86Register::Zmm20 => self.zmm20,
+            X86Register::Zmm21 => self.zmm21,
+            X86Register::Zmm22 => self.zmm22,
+            X86Register::Zmm23 => self.zmm23,
+            X86Register::Zmm24 => self.zmm24,
+            X86Register::Zmm25 => self.zmm25,
+            X86Register::Zmm26 => self.zmm26,
+            X86Register::Zmm27 => self.zmm27,
+            X86Register::Zmm28 => self.zmm28,
+            X86Register::Zmm29 => self.zmm29,
+            X86Register::Zmm30 => self.zmm30,
+            X86Register::Zmm31 => self.zmm31,*/
+            X86Register::R8b => self.r8b,
+            X86Register::R9b => self.r9b,
+            X86Register::R10b => self.r10b,
+            X86Register::R11b => self.r11b,
+            X86Register::R12b => self.r12b,
+            X86Register::R13b => self.r13b,
+            X86Register::R14b => self.r14b,
+            X86Register::R15b => self.r15b,
+            X86Register::R8d => self.r8d,
+            X86Register::R9d => self.r9d,
+            X86Register::R10d => self.r10d,
+            X86Register::R11d => self.r11d,
+            X86Register::R12d => self.r12d,
+            X86Register::R13d => self.r13d,
+            X86Register::R14d => self.r14d,
+            X86Register::R15d => self.r15d,
+            X86Register::R8w => self.r8w,
+            X86Register::R9w => self.r9w,
+            X86Register::R10w => self.r10w,
+            X86Register::R11w => self.r11w,
+            X86Register::R12w => self.r12w,
+            X86Register::R13w => self.r13w,
+            X86Register::R14w => self.r14w,
+            X86Register::R15w => self.r15w,
+            X86Register::Fpcw => self.fpcw,
+            X86Register::Fptag => self.fptag,
+            //X86Register::Msr => self.msr,
+            X86Register::Mxcsr => self.mxcsr,
+            X86Register::FsBase => self.fs_base,
+            X86Register::GsBase => self.gs_base,
+            X86Register::Fip => self.fip,
+            X86Register::Fcs => self.fcs,
+            X86Register::Fdp => self.fdp,
+            X86Register::Fds => self.fds,
+            X86Register::Fop => self.fop,
             _ => panic!("Unsupported register"),
         }
     }

src/backends/icicle-emulator/icicle_x86_64_emulator.cpp

@@ -1,5 +1,5 @@
 #define ICICLE_EMULATOR_IMPL
-#include "icicle_x64_emulator.hpp"
+#include "icicle_x86_64_emulator.hpp"
 
 #include <utils/object.hpp>
 
@@ -85,10 +85,10 @@ namespace icicle
         }
     }
 
-    class icicle_x64_emulator : public x64_emulator
+    class icicle_x86_64_emulator : public x86_64_emulator
     {
       public:
-        icicle_x64_emulator()
+        icicle_x86_64_emulator()
             : emu_(icicle_create_emulator())
         {
             if (!this->emu_)
@@ -97,7 +97,7 @@ namespace icicle
             }
         }
 
-        ~icicle_x64_emulator() override
+        ~icicle_x86_64_emulator() override
         {
             if (this->emu_)
             {
@@ -128,20 +128,20 @@ namespace icicle
             const gdtr entry{.limit = limit, .address = address};
             static_assert(sizeof(gdtr) - offsetof(gdtr, limit) == 12);
 
-            this->write_register(x64_register::gdtr, &entry.limit, 12);
+            this->write_register(x86_register::gdtr, &entry.limit, 12);
         }
 
-        void set_segment_base(const x64_register base, const pointer_type value) override
+        void set_segment_base(const x86_register base, const pointer_type value) override
         {
             switch (base)
             {
-            case x64_register::fs:
-            case x64_register::fs_base:
-                this->reg(x64_register::fs_base, value);
+            case x86_register::fs:
+            case x86_register::fs_base:
+                this->reg(x86_register::fs_base, value);
                 break;
-            case x64_register::gs:
-            case x64_register::gs_base:
-                this->reg(x64_register::gs_base, value);
+            case x86_register::gs:
+            case x86_register::gs_base:
+                this->reg(x86_register::gs_base, value);
                 break;
             default:
                 break;
@@ -226,7 +226,7 @@ namespace icicle
 
         emulator_hook* hook_instruction(int instruction_type, instruction_hook_callback callback) override
         {
-            if (static_cast<x64_hookable_instructions>(instruction_type) != x64_hookable_instructions::syscall)
+            if (static_cast<x86_hookable_instructions>(instruction_type) != x86_hookable_instructions::syscall)
             {
                 // TODO
                 return nullptr;
@@ -427,8 +427,8 @@ namespace icicle
         icicle_emulator* emu_{};
     };
 
-    std::unique_ptr<x64_emulator> create_x64_emulator()
+    std::unique_ptr<x86_64_emulator> create_x86_64_emulator()
     {
-        return std::make_unique<icicle_x64_emulator>();
+        return std::make_unique<icicle_x86_64_emulator>();
     }
 }

src/backends/icicle-emulator/icicle_x86_64_emulator.hpp

@@ -1,7 +1,7 @@
 #pragma once
 
 #include <memory>
-#include <x64_emulator.hpp>
+#include <arch_emulator.hpp>
 #include "platform/platform.hpp"
 
 #ifdef ICICLE_EMULATOR_IMPL
@@ -15,5 +15,5 @@ namespace icicle
 #if !MOMO_BUILD_AS_LIBRARY
     ICICLE_EMULATOR_DLL_STORAGE
 #endif
-    std::unique_ptr<x64_emulator> create_x64_emulator();
+    std::unique_ptr<x86_64_emulator> create_x86_64_emulator();
 }

src/backends/unicorn-emulator/unicorn_x86_64_emulator.cpp

@@ -1,5 +1,5 @@
 #define UNICORN_EMULATOR_IMPL
-#include "unicorn_x64_emulator.hpp"
+#include "unicorn_x86_64_emulator.hpp"
 
 #include <array>
 
@@ -18,19 +18,19 @@ namespace unicorn
         static_assert(static_cast<uint32_t>(memory_permission::exec) == UC_PROT_EXEC);
         static_assert(static_cast<uint32_t>(memory_permission::all) == UC_PROT_ALL);
 
-        static_assert(static_cast<uint32_t>(x64_register::end) == UC_X86_REG_ENDING);
+        static_assert(static_cast<uint32_t>(x86_register::end) == UC_X86_REG_ENDING);
 
-        uc_x86_insn map_hookable_instruction(const x64_hookable_instructions instruction)
+        uc_x86_insn map_hookable_instruction(const x86_hookable_instructions instruction)
         {
             switch (instruction)
             {
-            case x64_hookable_instructions::syscall:
+            case x86_hookable_instructions::syscall:
                 return UC_X86_INS_SYSCALL;
-            case x64_hookable_instructions::cpuid:
+            case x86_hookable_instructions::cpuid:
                 return UC_X86_INS_CPUID;
-            case x64_hookable_instructions::rdtsc:
+            case x86_hookable_instructions::rdtsc:
                 return UC_X86_INS_RDTSC;
-            case x64_hookable_instructions::rdtscp:
+            case x86_hookable_instructions::rdtscp:
                 return UC_X86_INS_RDTSCP;
             default:
                 throw std::runtime_error("Bad instruction for mapping");
@@ -195,10 +195,10 @@ namespace unicorn
             }
         }
 
-        class unicorn_x64_emulator : public x64_emulator
+        class unicorn_x86_64_emulator : public x86_64_emulator
         {
           public:
-            unicorn_x64_emulator()
+            unicorn_x86_64_emulator()
             {
                 uce(uc_open(UC_ARCH_X86, UC_MODE_64, &this->uc_));
                 uce(uc_ctl_set_cpu_model(this->uc_, UC_CPU_X86_EPYC_ROME));
@@ -215,7 +215,7 @@ namespace unicorn
 #endif
             }
 
-            ~unicorn_x64_emulator() override
+            ~unicorn_x86_64_emulator() override
             {
                 this->hooks_.clear();
                 uc_close(this->uc_);
@@ -254,10 +254,10 @@ namespace unicorn
             void load_gdt(const pointer_type address, const uint32_t limit) override
             {
                 const std::array<uint64_t, 4> gdtr = {0, address, limit, 0};
-                this->write_register(x64_register::gdtr, gdtr.data(), gdtr.size() * sizeof(uint64_t));
+                this->write_register(x86_register::gdtr, gdtr.data(), gdtr.size() * sizeof(uint64_t));
             }
 
-            void set_segment_base(const x64_register base, const pointer_type value) override
+            void set_segment_base(const x86_register base, const pointer_type value) override
             {
                 constexpr auto IA32_FS_BASE_MSR = 0xC0000100;
                 constexpr auto IA32_GS_BASE_MSR = 0xC0000101;
@@ -275,19 +275,19 @@ namespace unicorn
 
                 switch (base)
                 {
-                case x64_register::fs:
-                case x64_register::fs_base:
+                case x86_register::fs:
+                case x86_register::fs_base:
                     msr_val.id = IA32_FS_BASE_MSR;
                     break;
-                case x64_register::gs:
-                case x64_register::gs_base:
+                case x86_register::gs:
+                case x86_register::gs_base:
                     msr_val.id = IA32_GS_BASE_MSR;
                     break;
                 default:
                     return;
                 }
 
-                this->write_register(x64_register::msr, &msr_val, sizeof(msr_val));
+                this->write_register(x86_register::msr, &msr_val, sizeof(msr_val));
             }
 
             size_t write_raw_register(const int reg, const void* value, const size_t size) override
@@ -388,9 +388,9 @@ namespace unicorn
                 unicorn_hook hook{*this};
                 auto container = std::make_unique<hook_container>();
 
-                const auto inst_type = static_cast<x64_hookable_instructions>(instruction_type);
+                const auto inst_type = static_cast<x86_hookable_instructions>(instruction_type);
 
-                if (inst_type == x64_hookable_instructions::invalid)
+                if (inst_type == x86_hookable_instructions::invalid)
                 {
                     function_wrapper<int, uc_engine*> wrapper([c = std::move(callback)](uc_engine*) {
                         return (c() == instruction_hook_continuation::skip_instruction) ? 1 : 0;
@@ -400,7 +400,7 @@ namespace unicorn
                                     wrapper.get_user_data(), 0, std::numeric_limits<pointer_type>::max()));
                     container->add(std::move(wrapper), std::move(hook));
                 }
-                else if (inst_type == x64_hookable_instructions::syscall)
+                else if (inst_type == x86_hookable_instructions::syscall)
                 {
                     function_wrapper<void, uc_engine*> wrapper([c = std::move(callback)](uc_engine*) { c(); });
 
@@ -708,8 +708,8 @@ namespace unicorn
         };
     }
 
-    std::unique_ptr<x64_emulator> create_x64_emulator()
+    std::unique_ptr<x86_64_emulator> create_x86_64_emulator()
     {
-        return std::make_unique<unicorn_x64_emulator>();
+        return std::make_unique<unicorn_x86_64_emulator>();
     }
 }

src/backends/unicorn-emulator/unicorn_x86_64_emulator.hpp

@@ -1,7 +1,7 @@
 #pragma once
 
 #include <memory>
-#include <x64_emulator.hpp>
+#include <arch_emulator.hpp>
 #include "platform/platform.hpp"
 
 #ifdef UNICORN_EMULATOR_IMPL
@@ -15,5 +15,5 @@ namespace unicorn
 #if !MOMO_BUILD_AS_LIBRARY
     UNICORN_EMULATOR_DLL_STORAGE
 #endif
-    std::unique_ptr<x64_emulator> create_x64_emulator();
+    std::unique_ptr<x86_64_emulator> create_x86_64_emulator();
 }